Elevator car stopping status evaluation means

ABSTRACT

A means of defining the anticipated delay until a stopped, automatically restarted elevator car at any of a number of landings will again be running. Signals issued in conventional automatic elevator stopping sequences and characteristic of predetermined instances spaced in time during the stopping sequences are employed to gate portions of a pulse train to a pulse counter. The number of pulses gated is scaled to the anticipated delay so that the count in the counter is indicative of that anticipated delay. Elevator controls can be actuated according to the anticipated delay either alone or combined with other factors characteristic of delays to indicate a car&#39;&#39;s availability for service.

United States Patent Lauer June 26, 1973 l l ELEVATOR CAR STOPPINGSTATUS Primary Examiner-John W Caldwell EVALUATION MEANS Assistant ExaninerKenneth M. Leimer [75] Inventor: Robert J. Lauer, Toledo, OhioAttorney-Wilson & Fraser 73 Assi nee: Reliance Electric Com an Euclid, Il g Ohio p 57 ABSTRACT [22] Filed, June 10 197] A means of defining theanticipated delay until a stopped automatically restarted elevator carat any of [2]] Appl. No.: 151,861 a number of landing will again berunning. Signals issued in conventional automatic elevator stopping se-[52] U S CL 340/19 R 187/29 R quences and characteristic ofpredetermined instances [5]] Int 'B66b spaced in time during thestopping sequences are em- [58] Field "340/19 20 p y to g portions of apulse train to a pulse counter. The number of pulses gates is scaled tothe an- [56] References Cited ticipated delay so that the count in thecounter is indicative of that anticipated delay either alone or combinedUNITED STATES PATENTS with other factors characteristic of delays toindicate a 3,5] 1,342 H311 CI 3|. R cars availability for ervice3,643,762 2/1972 Schibli l87/29 R TOP ISVSET 43 START EVALUATION PRESETNTER 9 Claims, 2 Drawing Figures PATENTEDJUH 2 6 I973 m n w an r- A v AE F 4 0% NT N F. 0 BT q GN Q N mm? mm T EP WWW TE A N Nm 0 0 T m m M wSTOP IS SET START EVALUATION DOOR IS OPEN R O,R b E N W A v 8 L E 7 J dNT Mm R 1T T E T WE A A R mw w w BDIC V N 9 B PRESET COUNTER T ZERO EN LUNT MEMORY ELEVATOR CAR STOPPING STATUS EVALUATION MEANS CROSS-REFERENCETO RELATED APPLICATIONS This invention relates to the system disclosedin the applications of Gerald D. Robaszkiewicz for Elevator Control ForOptimizing Allotment of Individual Hall Calls to Individual Cars andMultiple Digital Comparator which were filed June 10, 197i, Ser. No.151,778 and filed June 9, 1971 Ser. No. 151,437, respectively.

FIELD OF THE INVENTION The present invention relates to elevatorcontrols and more particularly to means for evaluating the serviceburden imposed upon elevator cars which tends to retard their response.

BACKGROUND OF THE INVENTION Information concerning the availability ofan elevator car for service is significant in directing operation ofthat car and any cars with which it may be associated. It was recognizedearly in the development of automatic elevators that car loading was onesuch factor and many controls have been arranged to take this intoconsideration. The number of car calls registered in a 'car is anotherfactor which has been related to the cars availability and utilized inelevator system controls. U.S. Pat. No. 3,511,342 which issued May 12,1970 for Elevator Control for Ascertaining The Capability of Cars ToServe Hall Calls to Donivan L. Hall, William C. Susor and James H.Kuzara is for a system which seeks to assign registered hall callsindividually to the car of a group of cars which is best situated fromthe standpoint of the service burden imposed upon it to serve the hallcall. The Hall et al. control optimized allotment of individual hallcalls to individual cars considering the assigned hall calls and carcalls imposed on individual cars, their loading and their distance fromthe hall call. Improvements have added the special status of a car whichmight retard its response such as a parking status at the lobby or apartial shutdown as where the m-g set is off. These controls effectivelyestablish a prediction of the delay to be anticipated in causing the carto travel to the floor of the allotment call, which has been found to bequite accurate.

The present invention enhances the precision of the prediction. of delaytime by introducing an indication of the stop time to be expected wherea car is in a stopping status at the time the service burden on the caris considered. A greater optimization of the allotment process isthereby achieved.

SUMMARY OF THE INVENTION This invention utilizes the delay to beanticipated for a car committed to stop or stopped as a measure of oneservice burden imposed on the car. A- stopping operation of the caractuates various controls in a predetermined sequence. These sequencesnormally consume predetermined time intervals in a stop having noextraordinary operations such as the holding of a door or a reopening ofa door once it has initiated its closing. Advantage is taken of thesesequences to establish a measure of the interval remaining before thecar can again be started in motion from the stop to which it iscommitted.

In the example to be presented, the delay to restart ing or the capacityto restart is defined digitally as a series of pulses to a pulsecounter. This is done to permit combination with other factorsrepresented as pulse counts particularly where each count is scaled totime, as 0.5 second per pulse, representing the delay in service imposedby the imposed service conditions. It should be appreciated, however,that the measurement can be employed alone to indicate with precisionthe availability of a car for service. The measure can also be definedas threshold levels as by operating a short delay relay or a long delayrelay or by analogue techniques as with an analogue summing circuit.Where the availability of the car or'service burden imposed upon it areto be ascertained by this stopping status evaluation means a digitalcounter can be read by conventional means or as shown in the above notedsecond patent application and an analogue summer can be read by ananalogue signal comparator.

The example illustrates three phases or modes of stopping status asdiscrete intervals. The greatest delay is imposed if at the time theevaluation is made the car is in the interval from the institution ofthe stop to the time the car is fully stopped. This is represented by along train of pulses and is designated as the car slowdown mode. If thecar is stopped with its doors open a delay interval of intermediatelength can be anticipated in the door open time and the time to bringthe car back into effective travel, hence the door openmode produces apulse train of intermediate length. At the end of the door open intervala further delay in bringing the car up to speed including the doorclosing time and acceleration time are factors considered as the caracceleration mode and represented as a relatively short pulse train. Itis to be recognized that these modes develop a cumulative delay in theinverse order recited above. That is, the door open mode includes theacceleration mode and the car slowdown mode includes the door open modeand thus also the acceleration mode. Additional subdivision of astopping sequence can be undertaken, for example, by distinguishingwithin the slowdown between slowdown prior to the cars entry into theleveling zone and the final slowdown to a stop in the leveling zone, orduring acceleration mode a subdivision could be made between doorclosing and acceleration up to full speed. With further refinement, theentire stopping mode could be represented as a continuously decreasingdelay factor.

DESCRIPTION OF THE DRAWINGS FIG. 1 is a functional block diagram of theinvention; and

FIG. 2 is a logic diagram of a digital stopping status evaluation meansaccording to this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT The functional block diagram ofFIG. 1 represents the invention apart from a control system and elevatorcar or cars with which it might be combined.The repre- I the operativestate of the cars motor-generator set, the special service status of thecar, hall calls assigned the car, and car calls assigned the car. Thissystem is more fully disclosed in the above-noted G. D. Robaszkiewiczco-pending patent application for Elevator Control for OptimizingAllotment of Individual Hall Calls to Individual Cars. In that systemeach of the factors for each car is represented by a pulse count, eitheras a preset or as a train of pulses, applied to a counter for the cartermed a master binary counter. The pulses are scaled to time as timedelays anticipated to be imposed on the car for each factor. Ageneration of pulse counts is instituted when a hall call is registeredto cause a call allotment to be initiated and results in an assignmentof the call subject to allotment to the optimum service car asascertained by the car having the lowest count in its master binarycounter.

The present invention as represented in FIG. I can be considered to beplaced in operation when a stopping status evaluation is requested, asduring a hall call allotment, indicated by the block 10. The car may berunning with no call imposed in which case no stopping status evaluationis undertaken or alternatively it may be in a stopping mode wherein oneof its control elements indicates at Ill that the stopping operation isin its initial phase as the signal to stop has been applied to initiatethe slowdown to the floor of the call. If the car is in its intermediatestopping phase, another of its controls associated with that portion ofits operation is operated as represented at 12 as to indicate the dooris fully open. If the stopping operation is in its terminal phase, athird control such as a car start signal or a door close signal as at 13is operated. Each of ll, 12 or 13 actuate a suitable signal meansindicating the burden imposed on the car in terms of the delay until thecar will be started as at 14 and this signal is translated to caravailability for service at 15. In a multicar system each car isprovided with the generally described combination depicted in FIG. 1.

FIG. 2 shows a single car stopping status evaluating means. In the firstof the above noted Robaszkiewicz patent applications, this type of meansis employed for each of a plurality of elevator cars operating as asystem to ascertain which car has the least service burden with respectto a hall call and to assign the hall call to that car. All carsevaluation means are operated essentially simultaneously after their perfloor service burdens have been scanned completely and several staticindividual car service burden evaluations have been completed asindicated by a signal on lead I6. The stopping status for each car isevaluated and then the summed service burden as represented by the totalaccumulated count in master binary counter 17 is compared for all carsto ascertain which has the lowest burden and should receive theassignment. The stopping status evaluating means will be described forone car with reference to FIG. 2 and considering no other service burdenfactors.

If a car is not in a stopping phase when the signal START EVALUATION OFSTOP STATUS is imposed on I6 the evaluation sequences are skipped and asignal BIASING COMPLETE TO CENTRAL SEC- TION is issued at lead 18. Acombination of gates issues this signal under these circumstances orupon the conclusion of the signal generation indicating stop status.

In the drawing NAND and NOR gates are depicted by standard symbols asNAND gates 19 and 20 respectively representing a two input and a fiveinput gate employed for a logical and and a logical or function. NOR 22is employed as an and in the logic. As is conventional the NANDs issue awhen any input is and a when all inputs are while the NORs issue a()when any input is and a when all inputs are Typically, the gates andthe inverters such as 23 are integrated circuits available fromFairchild Semiconductor Division of Fairchild Camera and instrumentCorporation, 313 Fairchild Drive, Mountain View, Calif., such asSN7400N, SN7410N, SN7420N and SN7430N NAND units and SN7402 NOR units.The binary counters are also integrated circuits as one or more 4 bitbinary counters SN7493N from the same source.

In the detailed discussion, the logic elements will have their terminalsnumbered and designated by the elements reference character followed bythe terminal number separated by a dash. Where signals are discussed asapplied to or issuing from the terminals, their sign will be indicatedby a suffix for a positive going signal and for a negative going signal.Thus NAND 159 will be gated when its left-hand input terminals are bothpositive, designated I9-1+and I92+, to issue a negative signal at itsright-hand output terminal, designated l9-3-.

Stop status is represented as a pulse count generated as the capacitycomplement of a count preset on adjustable, multidecked, selectorswitches 24, 25 and 26 applied to master binary counter 17 as a readout.This count is controlled by binary preset counter 27 and NAND countgates 28, 29 and 30 which are satisfied to admit the complement of thebinary preset counters capacity, 16 in the example, to the master binarycounter 17. When any count gate is satisfied, counting gate NAND 20 isinhibited.

The condition of gate 20 controls the preset counter sequencing means 32for the stop status evaluator. When 20 is inhibited, an advance signalis passed from NAND 33 via lead 34 and inverter 35 to master countersequencing means 36. Sequencing means 32 also can gate binary presetcounter 27 through gated NAND 19 to cause the counter to accumulate thecount satisfying the inhibited gate 28, 29 or 30. Master countersequencing means 36 admits count to the master binary counter when NAND37 is gated and issues the signal BIASING COMPLETE TO CENTRAL SEC- TIONon lead 18 by gating NAND 38.

Assume as a first example of operation that at the time evaluation isstarted, the car is not in a stop mode of operation, but is running sothat the stop evaluation is skipped and a BIASING COMPLETE TO CEN- TRALSECTION is issued on lead 18. A on start lead 16 to sequence means 32enables NANDS i9 and 33 with a l9-2+and a 33ll+. Since no count is to bemade, counting NAND 20 is inhibited by 204 to issue 206+, thereby gatingadvance NAND 33 with a 332+while inhibiting preset counter NAND 19 witha il9ilfrom inverter 23. NAND 33 issues 33-3- to latch 20 with a 205-and through inverter 35 enables master binary counter sequencing means36 with a 37-l+ and a BIS-1+.

Sequencing means 36 issues a BIASING COM- PLETE TO CENTRAL SECTION as aon lead 118 by gating advance NAND 38. Since the preset counter 27 wasnot enabled, its count remained at zero to impose a on lead 39 so thatNAND 40 received a 40-1- and issued a 40-3+ as a 38-2+. Coincidence of381+ and 382+ makes 38-3- to inhibit NAND 37 with 37-2-, to latch NAND40 with a 40-2, and to issue through inverter 42 the signal on lead 18.

Where the car is in a stopping mode of operation, NAND is enabled at thetime lead 16 receives a signal so that it issues 20-6- to inhibit NAND33 and gate NAND 19. In the example, three stopping modes areconsidered. If a stop is set as by the initiation of the slowdown of thecar from its running speed to stop it at a floor, a STOP IS SET SIGNALis present as a on lead 43. This partially enables car slowdown countgate 28 through inverter 44 to impose 28-1+, inhibits car accelerationgate 30 by a 30-3- and inhibits NAND 45 by 45-1-. NAND 45 issues a 45-3+to satisfy NAND 20 with a 20-4+. Only gate 28 can be enabled if the caris in its slowdown mode since the car is not stopped and, therefore,lead 46 has a signal as 29-6- and 30-6- to inhibit the car door opengate 29 and car acceleration gate 30.

If the car were in the door open mode, as where it is stopped and thedoor is open to a predetermined degree, a door open limit indicates thedoor is open to within at least 2 inches of its full open position, asignal is present on lead 47. This signal can be arranged to becancelled as soon as the car receives a door close signal. With lead 4729-4+ enables NAND 29 and inverter 48 by 28-5- and 30-1- inhibits 28 and30.

STOP IS SET signal remains as a on lead 43 to cause NAND 45 to provide a20-4+ and satisfy NAND 20 so the count sequence can proceed.

The acceleration mode can be measured from the issuance of the car startsignal as where door closing is initiated to make lead 47 and can extenduntil the car starts to move when lead 46 is made At this time the STOPIS SET signal is cancelled, hence lead 43 is and NAND 45 is inhibited bythe of the starting signal on lead 46 through inverter 41 to make 45-2-and 45-3-lto gate NAND 20. As the door close signal is imposed, lead 43goes to inhibit through inverter 44 the car slowdown NAND 28 at 28-1-and directly enable 30 by 30-3+. Lead 47 inhibited the car door openNAND 29 by 29-4-and enabled 30 through inverter 48 by 30l+. 28-5+ has noeffect at this time because of 28-1-. The car has not yet begun to moveunder these circumstances so lead 46 is to apply an enabling 306+.

Assume first that a car has picked up a stopping signal but has notopened its door. NAND 20 is gated since all of its inputs are That is28, 29 and 30 are all inhibited since they have no count. NAND 45 isinhibited by the STOP IS SET signal on 43 which makes 45-1- and 45-3-l-,and the latch is released to make lead 34 Counting gate 20 issues a20-6- which is inverted to a 19-1+ by inverter 23. Since 19-2+ wasimposed by the start signal, 19-3- issues on lead 49 to binary presetcounter control NAND 50 as 50-2-. At this time the master count gate 37of sequence means 36 is inhibited to issue a 37-3+ on lead 52 to apply50-1+ so that the shift of 50-2 from to causes 50-3 to shift from tothereby enabling NAND 53. NAND 53 institutes admission of pulses to theCOUIIIEI'S.

An astable 54 generates pulses continuously at 3 KHZ so that the firstpositive going signal twice inverted in inverters 55 and 56 gate 53 toissue a pulse 53-3. This pulse is inverted at 57 to impose 58-1- on NAND58 to set ENABLE COUNT MEMORY flip flop 59 made up of cross connectedNANDs 60 and 62. When memory 59 is set by a negative signal on its setlead as 60-1, it issues and maintains a 60-3+ enabling signal on pulseadmitting NAND 63 until a signal is applied to lead 64 to make resetinput 62-2 With NAND 63 enabled by 63-1+, the negative going pulses fromastable 54 inverted to lead 65 by inverter 55 appear as 63-2-lto gate a63-3- to lead 66 whereby inverter 67 applies advance counts to binarypreset counter 27.

Counter 27 has four stages and corresponding outputs at lead 68, 69, 70and 71 for a count one, two, four and eight respectively. It issuessignals at its output to the switches 24, 25 and 26 at their decks A, Band C through the eight, four and two count leads 71, 70 and 69respectively. Wipers for each deck are designated by the prefix W andthe suffix of the deck. Thus, signals are passed by wiper W24A on lead72 to 28-3, from W24B on lead 73 to 28-4, and from W24C on lead 74 to28-6. A constant bias can be applied to any of the wipers from asuitable source (not shown) coupled to lead 75 so that, with the gangedwipers of switch 24 at the uppermost position, a signal from lead 75 iscoupled to leads 72 and 73 continuously, whereby gate 28 required only acount of two in binary preset counter 27, imposing a on lead 69 throughW24C to lead 74 to impose coincidence on the inputs to 28.

When 28 is satisfied, it issues a 28-7- appearing as 20-1- to inhibitNAND 20 which issues 20-6+ to inhibit NAND 19 and gate NAND 33, therebyadvancing the sequence to sequence means 36 by a signal from inverter35. NAND 37 is gated to issue a 37-3- on lead 52 because the partialcount in binary preset counter has imposed a on lead 39 to gate NAND 40and by 40-3- as 38-2- to inhibit NAND 38.

Counter 27 made lead 39 as soon as a count was entered to make lead 68and thereby cause NOR 76 to inhibit NAND 77 when 76-1 made'76-3- to77-1- and thus 77-3+. This lead 39 condition is sustained until thecapacity count of 16 or zero is achieved and all of leads 68, 69, 70 and71 are returned to whereby both NORS 76 and 78 are gated to gate NAND 77and impose a 77-3- on lead 64 to reset the Enable Count Memory 59.

After count NAND 28 is gated to inhibit counting NAND 20, the balance ofthe pulse count capacity of preset counter 27 is admitted to the masterbinary counter 17. Thus the capacity complement of the preset valueestablished by the setting of switch 24 is imposed on lead 66 after thecount NAND is satisfied until the preset counter is filled and returnedto zero. This count is admitted by enabling NOR 22 so that it gates eachpulse to counter 17. A 22-1- signal is the COUNT MASTER BINARY COUNTERSIGNAL from gated NAND 37.

When the preset counter returns to zero, it resets the enable countmemory 59 and inhibits NAND 40 by a 40-1- causing a 40-3+ to gate NAND38. NAND 38 by 38-3- inhibits NAND 37 making lead 52 to inhibit NAND 22and block further pulses to master binary counter 17 and inhibit NAND50-to block passage of further pulses by NAND'53 from astable 54. 38-3-also latches sequencer 36 by NAND 40 with a 40-2- and by inverter 42issues a BlASING COMPLETE TO CENTRAL SECTION at 18.

The count in the master binary counter can be considered indicative ofthe stopping status of the car and read by conventional means (notshown) coupled to its output leads. Such readout can be enabled by thesignal on lead 18. Prior to the next assessment of stopping status, themaster binary counter 17 and the binary preset counter are reset by asignal on reset lead 79.

Similar sequences will occur if the car is in its door open phase,however, NAND 29 will provide count control to counting NAND 20 and willreceive its controlling signals through decks A, B and C of switch 25.In this instance the wipers of switch 25 are connected W25A to lead 80and 29-2, W25B to lead 82 and 29-3 and W25C to lead 83 and 29-5.

When the car is in the acceleration phase, count gate 3% controlscounting gate 20 and receives its controlling signals from switch 26.Switch wipers apply their counter output or bias counterparts as aneight count level from W26A to lead 84 to 30-4, a four count level fromW268 to lead 85 to 20-5, and a two count level from W26C to lead 86 to30-7.

Selector switches 24, 25 and 26 are shown set respectively at theireighth, seventh and fourth positions to satisfy their respective carslow down count gate 28, car door open count gate 29 and caracceleration count gate 30, with a relatively short preset count of two,an intermediate preset count of for and a relatively long preset countof 10. As a result, the initial portion of the stop interval, that ofslowdown, is defined by a long count of 14 into counter l7 (14 being thecapacity count complement of two for preset counter 27). in a similarfashion the intermediate portion of the interval,

during the door open phase, is defined by a medium length count of 12(12 being the capacity count complement of four for preset counter 27),and the final portion of the interval, during the acceleration phase, isdefined by a short length count of six (the capacity count complement offor preset counter 27). These values can be adjusted by manualrepositioning of the wipers of switches 24, 25 and 26. For convenience,all wipers of each switch can be coupled as by a common shaft to affordsuch adjustment in a single setting for each switch.

It is to be understood that analogue signals or merely on-off signals asrelay controls can be substituted for the pulse count and digital readtechniques employed in the example set forth above. The concept ofsegregating the stopping base of a car in an early to start mode anintermediate delay to start mode and a long delay to start mode" can beexpanded to a greater number ofincrements or modified to a continuouslyvariable factor of the anticipated delay to start" as a measure of yearavailability for additional service. While the anticipated delay tostart has been employed in ascertaining one of a number of delay factorson an individual car basis for the purpose of ascertaining the car of aplurality best suited to receive assignment of a registered hall call,it is to be understood that the invention lends itself to manyvariations including single car control, and for purposes of controlother than hall call assignment including car starting and by-passingcontrols. Accordingly, the above example is to be read as illustrativeand not in a limiting sense.

l claim:

l. in an elevator system comprising a car serving a plurality oflandings, control means stopping the car at the landings and forstarting the car a predetermined interval following the stop of the car,the improvement which comprises means coupled to said control means andresponsive to different discrete signals issued by said control means atpredetermined times between the stopping setting of said control to stopsaid car at each of a plurality of said landings and the car statingoperation of said control to bring said car to speed; means to initiatean evaluation of the anticipated amount of stop ping interval remaining;means responsive to said signal responsive means to generate signalsscaled to the anticipated remaining stopping interval and variableindicating means coupled to said signal generating means and saidinitiating means to indicate the anticipated remaining stopping intervalat the time of operation of said evaluation initiating means.

2. A system according to claim 1 wherein said signal generating means isresponsive to a first signal characteristic of the early portion of thesequence of said con trol means bringing said car to a stop andrestarting said car at a landing and to a second signal characteristicof the portion of the sequence of said control means bringing said carto a stop and restarting said car at a landing which is later than thatcharacterized by said first signal; and wherein said indicating meanswhen actuated by said initiating means between said first and secondsignals indicates a relatively long anticipated remaining stoppinginterval and when actuated by said initiation means subsequent to saidsecond signal indicates a second relatively short anticipated remainingstopping interval.

3. A system according to claim 2 wherein said signal generating means isresponsive to a third signal characteristic of a terminal portion of thesequence of said control means bringing said car to a stop andrestarting said car at a landing which is subsequent to that portioncharacterized by said second signal; and wherein said indicating meanswhen actuated by said initiating means subsequent to said third signalindicates a shorter anticipated stopping interval than said secondinterval.

4. A system according to claim 3 including a car door for the carwherein said early portion occurs during deceleration of the car, saidlater portion occurs while the car door is open, and said terminalportion occurs upon initiation of door closing.

5. A system according to claim i wherein said signal generating means isresponsive to a first signal from said control means characteristic ofthe initiation of slowdown of a car approaching a landing and to asecond signal characteristic of the stopping ofthe car at said landing;and wherein said indicating means when actuated by'said initiating meansbetween said first and second signals indicates a relatively longanticipated remaining stopping interval.

6. A system according to claim 1 wherein said signal generating means isresponsive to a first signal characteristic of the stopping of the carat said landing and to a second signal characteristic of the initiationof a car start from said landing; and wherein said indicating means whenactuated by said initiating means between said first and second signalsindicates a relatively short anticipated remaining stopping interval.

7. in an elevator system according to claim it including a car door forthe car and door control means to responsive to different discretesignals are controls for trains of signal pulses; and wherein saidindicating means is a pulse counter.

9. A system according to claim 1 including means to adjust the magnitudeof at least one signal issued by said signal generating means.

I UNITED STATES PATENT: OFFICE CERTIFICATE OF CORRECTION Patent No. 3742 ,445 Dated June 26 1973' Inventor(s) ROBERT LAUER It is certifiedthat error apoears in the above-identified patent and that said LettersPatent are hereby corrected as shown below:

In the Abstract, line 10, after "delay" insert- Elevator controls can beactuated according to the anticipated delay e Column 7, line 30, l'for"should be four Column 7, line 51, "base" should be phase Signed andsealed this 14th day of January 1975.

(SEAL) Attest: v

MCCOY M. GIBSON JR- C- MARSHALL DANN Attesting Officer Coxmnissioner ofPatents FORM PO-l050 (10-69) USCOMM-DC 60376-P69 s u.s. covsmmsm'PRINTING orncs lsu 0-366-334,

UNITED STATES PATEN'I: OFFICE; i CERTIFICATE OF CORRECTION Patent No. 3742 445 Dated Tune 26-, 1973 Inventor(s ROBERT LAUER It is certifiedthat error appears in the above-identified patent and that said vLettersPatent are hereby corrected as shown below:

" In the Abstract, line 10, after "delay" insert- Elevator controls canbe actuated according to the anticipated Column 7, line 30, "for" shouldbe four Column 7, line 5 1, a 4 "base" should be phase 4 Signed andsealed this 14th day of January 1975.

I (SEAL).

Arrest: MCCOY M. GIBSON JR. C. MARSbIAL-L DANN Attesting OfficerCommissioner of Patents FORM F'O-1050 (IO-'59) USCOMM-DC 6O376-P69 Hi5.GOVERNMENT PRINTING OFFICE I969 O-366-334,

1. In an elevator system comprising a car serving a plurality oflandings, control means stopping the car at the landings and forstarting the car a predetermined interval following the stop of the car,the improvement which comprises means coupled to said control means andresponsive to different discrete signals issued by said control means atpredetermined times between the stopping setting of said control to stopsaid car at each of a plurality of said landings and the car statingoperation of said control to bring said car to speed; means to initiatean evaluation of the anticipated amount of stopping interval remaining;means responsive to said signal responsive means to generate signalsscaled to the anticipated remaining stopping interval and variableindicating means coupled to said signal generating means and saidinitiating means to indicate the anticipated remaining stopping intervalat the time of operation of said evaluation initiating means.
 2. Asystem according to claim 1 wherein said signal generating means isresponsive to a first signal characteristic of the early portion of thesequence of said control means bringing said car to a stop andrestarting said car at a landing and to a second signal characteristicof the portion of the sequence of said control means bringing said carto a stop and restarting said car at a landing which is later than thatcharacterized by said first signal; and wherein said indicating meanswhen actuated by said initiating means between said first and secondsignals indicates a relatively long anticipated remaining stoppinginterval and when actuated by said initiation means subsequent to saidsecond signal indicates a second relatively short anticipated remainingstopping interval.
 3. A system according to claim 2 wherein said signalgenerating means is responsive to a third signal characteristic of aterminal portion of the sequence of said control means bringing said carto a stop and restarting said car at a landing which is subsequent tothat portion characterized by said second signal; and wherein saidindicating means when actuated by said initiating means subsequent tosaid thIrd signal indicates a shorter anticipated stopping interval thansaid second interval.
 4. A system according to claim 3 including a cardoor for the car wherein said early portion occurs during decelerationof the car, said later portion occurs while the car door is open, andsaid terminal portion occurs upon initiation of door closing.
 5. Asystem according to claim 1 wherein said signal generating means isresponsive to a first signal from said control means characteristic ofthe initiation of slowdown of a car approaching a landing and to asecond signal characteristic of the stopping of the car at said landing;and wherein said indicating means when actuated by said initiating meansbetween said first and second signals indicates a relatively longanticipated remaining stopping interval.
 6. A system according to claim1 wherein said signal generating means is responsive to a first signalcharacteristic of the stopping of the car at said landing and to asecond signal characteristic of the initiation of a car start from saidlanding; and wherein said indicating means when actuated by saidinitiating means between said first and second signals indicates arelatively short anticipated remaining stopping interval.
 7. In anelevator system according to claim 1 including a car door for the carand door control means to control said car door position wherein saidsignal generating means is responsive to a first signal characteristicof said car door being at least partially open; and wherein saidindicating means when actuated by said initiating means while saidsignal generating means is responsive to said first signal indicates arelatively short anticipated remaining stopping interval.
 8. A systemaccording to claim 1 wherein said means responsive to different discretesignals are controls for trains of signal pulses; and wherein saidindicating means is a pulse counter.
 9. A system according to claim 1including means to adjust the magnitude of at least one signal issued bysaid signal generating means.